ABSTRACT

Silicon Carbide (SiC) is the most promising semiconductor for efficient and reliable electrical energy conversion and power management. Whereas the micropipe defects in the bulk SiC material have been effectively eliminated (to levels near 1 cm^-2), state-of-the-art bulk SiC crystal growth techniques yield densities of about 10³ - 10⁴ cm^-2 for Threading Screw Dislocations (TSDs) which propagate into the subsequently grown epitaxial layers. In addition, there are densities of about 10^{4 -} 10⁵ cm^-2 of Threading Edge Dislocations (TED) in the epitaxial layers (some of which propagate from the bulk crystal during epitaxial growth while others convert from basal plane dislocations) as well as very low densities of Basal Plane Dislocations (BPDs) which propagate from the substrate. These crystal defects prevent the development of cost-effective and reliable high-voltage SiC power devices. The best SiC power switch commercially available today is a 1700V/25A Schottky Barrier Diode (SBD); its application in power circuits requires bulky, costly and inefficient snubbers. Only recently, a 1200V/33A SiC power MOSFET is commercially made available; its performance and reliability in power circuits remain highly speculative. All commercial SiC devices are expensive; they- have limited dv/dt ratings especially at elevated temperatures, and are not avalanche rated. There is limited knowledge of the role that the crystal defects play on the leakage current characteristics and switching reliability of SiC power devices; most studies and results are masked by effects due to edge termination and surface leakage currents, and often limited to low-voltage and low-current devices. A fundamental investigation to understand the role of bulk and epitaxial TSDs and TEDs on high-voltage and high-current SiC devices is therefore of paramount importance.

A systematic approach consisting of electrical testing and physics-based device modeling will be developed to delineate the role of bulk and epitaxial defects on the leakage current and voltage switching characteristics of high-voltage and high-current SiC power devices. Commercially available SiC power SBDs and the body pin diodes in SiC power MOSFETs will be studied both prior to and after the application of electrical stress. Non-destructive Synchrotron White Beam X-ray Topography (SWBXT) imaging and KOH etching will be employed to investigate the role of bulk and epitaxial TSDs and TEDs on the electrical characteristics at various stages of materials growth, device fabrication and electrical stress application. A new Accelerated High-Temperature Reverse Bias (AHTRB) stress test with a reactive load will be employed in order to accelerate charge generation (while switching high voltages) in the vicinity of defect sites; micro plasma generation and local "hot spot" formation will be studied in detail and correlated to bulk material TSD and TED densities. The leakage current and voltage switching capability will be measured at various temperatures from -50°C to 200°C; experimental results will be validated using two-dimensional (2D) device simulations where crystal defects are expected to alter the local energy band structure of the material. Compact device circuit simulation models will be developed and incorporated into standard power circuit simulators, and a new model to predict the "lifetime" of SiC power devices in power circuits with varying dv/dt stress will be reported.

This research is expected to make significant contributions to the fundamental understanding critically needed to "unlock" the enormous potential of SiC power devices across the full range of Army applications and make transformational impact on energy efficiency.

KS: November 1, 2011

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